In case of a semiconductor apparatus according to the related art, as shown in FIG. 2, a crack 120 may be generated on a semiconductor chip 110 due to stress that occurs during a cutting process, a mounting process, or a heating process.
JP-A-Hei6(1994)-244254, JP-A-2005-277338, and JP-A-2005-353815 disclose the solving means for the above-mentioned problem. The above documents disclose a semiconductor apparatus that is mounted on a package substrate.
Referring to FIG. 3, the package substrate 124 includes a plurality of terminals 126 that is provided along the outer periphery. Further, a semiconductor chip 110 includes plural electrode pads 112 that are provided along the outer periphery. The terminals 126 and the electrode pads 112 are connected to each other by a bonding wire 130.
The semiconductor chip 110 further includes a wiring 118 provided between the electrode pads 112 and the outer periphery of the semiconductor chip 110 to connect the adjacent first electrode pad 112a and second electrode pad 112b. The first electrode pads 112a of the semiconductor chip 110 and the first terminal 126a of the package substrate 124 are connected to each other by a bonding wire 130. Similarly, the second electrode pad 112b and the second terminal 126b are connected to each other by the bonding wire 130.
When a crack 120 is generated in the semiconductor chip 110, the wiring 118 is disconnected. In this case, a resistance between the first terminal 126a and the second terminal 126b is changed, which makes to enable to detect the crack 120.
Further, JP-A-Hei6(1994)-244254 discloses that both ends of a conductor pattern are convoluted to each other, and two measuring electrode pads connected at the both ends of the conductor pattern are formed at one edge.